Arithmetic units are those which carry out an arithmetic operation in response to execution of an arithmetic instruction. Such instructions include an add instruction, a multiply instruction, a divide instruction and a subtract instruction. It is common to have in a computer system a so-called ALU (arithmetic logic unit) which is capable of implementing any one of these arithmetic instructions.
There are frequent occasions when it is required to multiply together pairs of objects and to add together the resulting products. This is presently done by effecting a multiplication operation on each pair of objects, storing the results of the multiplication operations in a register file and subsequently executing an addition instruction which recalls the earlier generated results from the register file and adds them together, finally loading the result back to the register file. One problem with this arrangement is that the length of the words resulting from the multiplication operations are much longer than the original operands. For example, the multiplication together of two 16 bit objects will result in a 32 bit word. It is therefore necessary to have available register capacity to store these results. One way round this problem which is currently used is to introduce rounding to reduce the word lengths prior to storage. This however can introduce rounding errors and can result in the multiplication not being carried out to adequate precision.
Another problem is the requirement to execute two instructions, a multiplication instruction followed by an add instruction. Not only do these instructions take up space in the instruction sequence stored in memory but they take time to execute.